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ARM arithmetic addition and flags update

开发者 https://www.devze.com 2023-03-18 09:28 出处:网络
I am reading ARM assembly book by JR Gibson, chapter 5. In explanation to integer ADD and SUB instructions the table is given for flag updation after calculation of result.

I am reading ARM assembly book by JR Gibson, chapter 5. In explanation to integer ADD and SUB instructions the table is given for flag updation after calculation of result.

What I am not able to understand is the flag开发者_JAVA技巧 update for unsigned integer addition for 2 integers A, B where A and B are "not both 0" and the result is 2^31-1 < result < 2^32(i.e between 0x7FFFFFFF, 0x100000000)

It states that the above results in flags N=1, Z=0, C=0, V=X (don't care) being set and instruction mnemonic extensions being interpreted as

EQ = No, NE = Yes, CS = No, CC = Yes, MI = Yes, PL = No, VS, VC = X, HI = No, LS = Yes, LT, GT, LE = X

Why unsigned addition resulting in within 32 bit range value causes setting of N bit (and hence MI and LS are Yes)

What I was expecting is N flag can be set since 31st bit is 1 (counting from bit 0), but the result is anyway positive (i.e PL = Yes, since it is within range 2^31-1 ~ 2^32).

Am I not understanding some thing here?


The N flag is always set to the bit 31 of the result. The processor does not care whether you add or subtract signed or unsigned numbers - the resulting bit pattern is the same in both cases. Similarly, the PL/MI suffixes just check for the N flag; they don't care whether you consider numbers signed or unsigned.

Signedness is important for multiplication and division, that's why those instructions have two mnemonics.


Subtraction and addition (can) use the same adder (logic), subtraction feeds one input of the adder with the inverse of the operand and then sets the carry in, addition feeds the operands straight through and zeros the carry in. (invert and add one) Signed and unsigned matter when it comes to the overflow (on addition/subtraction). C is the unsigned overflow bit and V is the signed overflow bit. The hardware doesnt care, normally if the instruction generates one it generates them both. The high level language and or user cares, the hardware just does what is basically an unsigned addition and sets the flags.

And as mentioned multiplication is a different beast and needs an unsigned and signed version.

The ARM ARM and other ARM docs show you which flag bits are tied to which mnemonic, dont worry about what the letters of the mnemonic are, focus on the flag bits you are interested in testing for. The ARM docs are very detailed when describing how the flag bits are generated on an instruction by instruction basis.

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