Generate a Makefile from source and executable?

I've got a large code base that builds fine using a old custom build system cobbled together using bunch of bash scripts and simple Makefiles recursively combined.

How can I go about recreating the build system using a modern version of GNU make? (Or some other tool.)

The code base is large, split in to many sub-directories, and has non-trivial cross sub-folder dependencies and system library linking requirements.

Since I can build a debug-enabled set of executables using the current build system just fine, is there any way开发者_开发百科 to introspect in to these files construct a fresh set of build and linking rules?

Thank you

---

There is no magic that will untangle this build system for you. Cleaning it up will take slow, careful work (testing all the way, naturally).

Start running your makefiles under GNUMake, if you don't already. Gradually clean them up, merge them, absorb the functions of the bash scripts into them. Chart these "non-trivial cross sub-folder dependencies"; see how Make handles dependencies, and when you feel up to it, try Advanced Auto-Dependency Generation in a sandbox off to one side; it's a little tricky to understand at first, but once you start using it you'll love it.

You may be tempted to just leave well enough alone. After all, the build system works as is. The trouble is that it is teetering on the Schwartzschild limit. Right now you can clean it up-- it won't be easy, but it'll be within your ability. But if you don't, small changes to the codebase will require small changes to the build system, always adding, never reducing. The build system will grow, in size and complication, the job of cleanup will gradually become more difficult until it passes beyond your horizon, after which you will not be able to reduce the mess faster than it grows (and still do all of the other stuff you have to do). This is a well-known anti-pattern.

---

The two techniques I've used to get GNU make to do any kind of introspection were:

• for static GNU make dependency analysis: inject "-d -p" flags into existing (working) make processes, then post-process the output with awk/sed/python to generate call graphs with graphviz/dot output.
• for dynamic GNU make process/target analysis: use "make SHELL=~bin/make_introspect.sh" which can detect and emit records (like command lines, targets, process IDs, recipes) at the boundaries where makefiles call recipes, and makefiles call other makefiles

Sorry for the general nature of the answer, so far I've never generalized those techniques just used them in specific projects