Consider arm as platform and Linux as OS used.
Consider cache is disabled by means of enabling CONFIG_CPU_DCACHE_DISABLE in k开发者_如何学JAVAernel config. This option basically disables L1 cache. Disabling L1 cache will obviously disable L2 cache?
After this, any mcr instruction will not have any impact regarding cache. It means any dma_cache_maint() operation is equivalent to NULL?
Link:http://lxr.linux.no/#linux+v2.6.35/arch/arm/kernel/head.S#L166
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