I'm trying to create a make file which will compile all the .cpp files in the test directory to .o files in the obj directory. Below is an abridged version of what I am doing. The problem is that the calls made to compile to the .o files have th开发者_开发百科e proper .o name, but they all are compiling the same .cpp file.
gcc -c -o obj/foo.o test/foo.c
gcc -c -o obj/bar.o test/foo.c
gcc -c -o obj/baz.o test/foo.c
What do I need to change to make it compile the corresponding .cpp file?
CPP_FILES := $(wildcard test/*.cpp)
OBJ_FILES = $(patsubst test/%.cpp,obj/%.o,$(CPP_FILES))
obj/%.o: $(CPP_FILES)
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -c -o $@ $<
executable : $(OBJ_FILES) foo.a
$(CXX) $(CPPFLAGS) $(CXXFLAGS) -lpthread $^ -o $@
Thanks.
You need to match % for your template rule. at the moment you are saying that every .o depends on every cpp file. And $< is the first of them.
Replace it with:
obj/%.o : test/%.cpp
加载中,请稍侯......
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