xilinx

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Generate State Machine graph from VHDL code?

Is t开发者_JAVA百科here any quite good tool to generate State Machine graph from VHDL code? I\'m using Xilinx ISE Webpack. Cheers!Active HDL has a feature called \"Code2Graphics\" which supports this.[详细]

2023-03-10 16:50 分类：问答
How to obtain the maximum of a number in Simulink?

I am building a model which requires me to find the maximum of a set of 8 signals, also find the index of the maximum value.[详细]

2023-03-07 04:04 分类：问答
Implementing ceil function in Xilinx

I would like to take the ceil of the signal in Simulink(Xilinx Library). So, if for instance, the signal value is 1.5, the output would be 2.[详细]

2023-03-06 13:02 分类：问答
Using Slice Block in Simulink

I 开发者_如何学运维am having some trouble using the Slice block(Xilinx Bit Slice Extractor).[详细]

2023-03-06 10:26 分类：问答
Timing Signal understanding in Xilinx Simulink

I am having some trouble understanding the concept of Timing Signals in Simulink (Xilink Library). I will explain with an example,[详细]

2023-03-05 15:36 分类：问答
How to obtain a absolute of a number in Xilinx Simulink?

I need to get the absolute of the signal in Xilinx Simulink. 开发者_如何学编程I can use a mcode block and write matlab code to achieve it. But, just curious if there is a better way of doing it.[详细]

2023-03-04 13:08 分类：问答
Sine of the signal in Xilinx Simulink

I am implementing a DQPSK modulator and Demodulator. I would like to calculate the exp(1j*Phase) in Simulink.[详细]

2023-03-03 14:50 分类：问答
DBPSK Demodulation in Simulink using Xilinx blockset

I am trying to build a DBPSK demodulator using Simulink and Xilinx blockset. I calculate the Phase Difference of the Successive samples like this :[详细]

2023-03-02 19:08 分类：问答
How to generate schematic file from verilog source in Xilinx

What I\'m doing I started playing around with Xilinx ISE Design Suite and wrote simple Arithm开发者_运维知识库etical Logic Units in verilog. Using verilog Unit Under Tests to create input and output s[详细]

2023-02-27 03:42 分类：问答
Design Flow to create a bootable SPI Flash (PROM File) for a Xilinx Spartan-6 containing Configuration bitsream AND Microblaze software

I would like to know the proper procedure to cr开发者_C百科eate a PROM file (.MCS) for a serial SPI Flash that include BOTH the FPGA configuration bitstream and the software to be used by the Microbla[详细]

2023-02-25 21:26 分类：问答